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Datasheet File OCR Text:

19-0793; Rev 3; 3/11
KIT ATION EVALU BLE AVAILA
TFT-LCD DC-DC Converter with Operational Amplifiers
General Description Features
o 2.5V to 5.5V Input Supply Range o 1.2MHz Current-Mode Step-Up Regulator Fast Transient Response to Pulsed Load High-Accuracy Output Voltage (1%) Built-In 20V, 3A, 0.16 n-Channel MOSFET High Efficiency (85%) o Linear-Regulator Controllers for VGON and VGOFF o High-Performance Operational Amplifiers 130mA Output Short-Circuit Current 45V/s Slew Rate 20MHz, -3dB Bandwidth Rail-to-Rail Inputs/Outputs o Logic-Controlled, High-Voltage Switch with Adjustable Delay o Timer-Delay Fault Latch for All Regulator Outputs o Thermal-Overload Protection o 0.6mA Quiescent Current
MAX8795A
The MAX8795A includes a high-performance step-up regulator, two linear-regulator controllers, and five highcurrent operational amplifiers for active-matrix, thin-film transistor (TFT), liquid-crystal displays (LCDs). Also included is a logic-controlled, high-voltage switch with adjustable delay. The step-up DC-DC converter provides the regulated supply voltage for the panel source driver ICs. The converter is a high-frequency (1.2MHz) current-mode regulator with an integrated 20V n-channel MOSFET that allows the use of ultra-small inductors and ceramic capacitors. It provides fast transient response to pulsed loads while achieving efficiencies over 85%. The gate-on and gate-off linear-regulator controllers provide regulated TFT gate-on and gate-off supplies using external charge pumps attached to the switching node. The MAX8795A includes five high-performance operational amplifiers. These amplifiers are designed to drive the LCD backplane (VCOM) and/or the gammacorrection divider string. The device features high output current (130mA), fast slew rate (45V/s), wide bandwidth (20MHz), and rail-to-rail inputs and outputs. The MAX8795A is available in a lead-free, 32-pin, thin QFN package with a maximum thickness of 0.8mm for ultra-thin LCD panels, as well as in a 32-pin LQFP package with 0.8mm pin pitch.
Minimal Operating Circuit
VCN VCP
VIN LX IN STEP-UP CONTROLLER PGND AGND FB
VMAIN
Applications
Notebook Computer Displays LCD Monitor Panels Automotive Displays
COMP
VCP
MAX8795A
DRVP GATE-ON CONTROLLER FBP VGON
SRC DEL COM SWITCH CONTROL CTL VCN DRN
Ordering Information
PART MAX8795AETJ+ MAX8795AGCJ+ MAX8795AGTJ+ MAX8795AGTJ/V+ TEMP RANGE -40C to +85C -40C to +105C -40C to +105C -40C to +85C PIN-PACKAGE 32 Thin QFN 32 LQFP 32 TQFN 32 TQFN
DRVN GATE-OFF CONTROLLER VGOFF
SUP NEG1
FBN OUT1 OP1 REF NEG4
POS1 NEG2
REF
+Denotes a lead(Pb)-free/RoHS-compliant package. /V Denotes an automotive-qualified part.
OUT2
OP2
OP4
OUT4
POS2
POS4 NEG5
OUT3
OP3
OP5
OUT5
POS3 EP BGND
POS5
Pin Configurations appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
ABSOLUTE MAXIMUM RATINGS
IN, CTL to AGND ...................................................-0.3V to +7.5V COMP, FB, FBP, FBN, DEL, REF to AGND ....-0.3V to (VIN + 0.3V) PGND, BGND to AGND ......................................................0.3V LX to PGND ............................................................-0.3V to +20V SUP to AGND .........................................................-0.3V to +20V DRVP to AGND.......................................................-0.3V to +36V POS_, NEG_, OUT_ to AGND ...................-0.3V to (VSUP + 0.3V) DRVN to AGND ...................................(VIN - 30V) to (VIN + 0.3V) SRC to AGND .........................................................-0.3V to +40V COM, DRN to AGND ................................-0.3V to (VSRC + 0.3V) DRN to COM............................................................-30V to +30V POS_ to NEG_ RMS Current ...................................5mA (Note 1) Note 1: See Figure 2 for the op amp clamp structure. OUT_ Maximum Continuous Output Current....................75mA LX Switch Maximum Continuous RMS Current .....................1.6A Continuous Power Dissipation (TA = +70C) 32-Pin Thin QFN (derate 34.5mW/C above +70C) 2758mW 32-Pin LQFP (derate 48.4mW/C above +70C)....1652.9mW Operating Temperature Range, E Grade ............-40C to +85C Operating Temperature Range, G Grade .........-40C to +105C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Soldering Temperature (reflow) .......................................+260C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER IN Supply Range IN Undervoltage-Lockout Threshold SYMBOL VIN VUVLO (Note 2) VIN rising, typical hysteresis = 50mV VFB = VFBP = 1.3V, VFBN = 0V, LX not switching IN Quiescent Current IIN VFB = 1.2V, VFBP = 1.4V, VFBN = 0V, LX switching FB or FBP below threshold or FBN above threshold No external load 0 < ILOAD < 50A In regulation Rising edge; typical hysteresis = 160mV Temperature rising Hysteresis VMAIN fOSC TA = +25C to +85C TA = 0C to +85C VIN 1000 86 VFB No load VFB falling 0 < IMAIN < full load, transient only VIN = 2.5V to 6V VFB = 1.233V 1.221 1.212 1.10 1200 90 1.233 1.233 1.14 -1 0.1 +100 0.4 +200 +160 15 18 1400 93 1.245 1.248 1.17 10 1.15 TA = +25C to +85C TA = 0C to +85C 1.238 1.232 CONDITIONS MIN 2.5 2.05 2.25 0.6 2 200 1.250 1.250 1.262 1.266 10 TYP MAX 6.0 2.45 1.0 mA 3 ms V mV A V C UNITS V V
Duration-to-Trigger Fault Condition REF Output Voltage REF Load Regulation REF Sink Current REF Undervoltage Lockout Threshold Thermal Shutdown MAIN STEP-UP REGULATOR Output Voltage Range Operating Frequency Oscillator Maximum Duty Cycle FB Regulation Voltage FB Fault Trip Level FB Load Regulation FB Line Regulation FB Input Bias Current
V kHz % V V % %/ V nA
2
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TFT-LCD DC-DC Converter with Operational Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER FB Transconductance FB Voltage Gain LX On-Resistance LX Leakage Current LX Current Limit Current-Sense Transresistance Soft-Start Period Soft-Start Step Size OPERATIONAL AMPLIFIERS SUP Supply Range SUP Overvoltage Fault Threshold SUP Supply Current Input Offset Voltage Input Bias Current Input Common-Mode Voltage Range Common-Mode Rejection Ratio Open-Loop Gain Output Voltage Swing, High Output Voltage Swing, Low Short-Circuit Current Power-Supply Rejection Ratio Slew Rate -3dB Bandwidth FBP Regulation Voltage FBP Fault Trip Level FBP Input Bias Current FBP Effective Load-Regulation Error (Transconductance) FBP Line (IN) Regulation Error DRVP Sink Current DRVP Off-Leakage Current Soft-Start Period Soft-Start Step Size tSS IDRVP IFBP VFBP RL = 10k, CL = 10pF, buffer configuration IDRVN = 100A VFBP falling VFBP = 1.25V VDRVP = 10V, IDRVP = 50A to 1mA IDRVP = 100A, 2.5V < VIN < 6V VFBP = 1.1V, VDRVP = 10V VFBP = 1.4V, VDRVP = 34V 1 1.231 0.96 -50 -0.7 1 5 0.01 14 VREF / 128 10 GATE-ON LINEAR-REGULATOR CONTROLLER 1.250 1.00 1.269 1.04 +50 -1.5 10 V V nA % mV mA A ms V PSRR VOH VOL IOUT_ = 5mA IOUT_ = -5mA To VSUP / 2, source or sink DC, 6V VSUP 18V, (VNEG_, VPOS_) VSUP / 2 75 60 45 20 VSUP 100 ISUP VOS IBIAS VCM CMRR 0 (VNEG_, VPOS_) VSUP Buffer configuration, VPOS_ = VSUP / 2, no load (VNEG_, VPOS_, VOUT_) VSUP / 2 (VNEG_ , VPOS_, VOUT_) VSUP / 2 -50 0 45 80 125 VSUP 50 50 130 100 VSUP 6.0 18.0 19 3.5 0 0 18.0 19.9 5.0 12 +50 VSUP V V mA mV nA V dB dB mV mV mA dB V/s MHz tSS RLX(ON) ILX ILIM SYMBOL CONDITIONS ICOMP = 2.5A From FB to COMP ILX = 200mA VLX = 19V VFB = 1.2V, duty cycle = 75% 2.5 0.1 MIN 75 TYP 160 700 160 10 3.0 0.2 14 VREF / 128 260 20 3.5 0.3 MAX 280 UNITS S V/ V m A A V/A ms V
MAX8795A
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3
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER FBN Regulation Voltage FBN Fault Trip Level FBN Input Bias Current FBN Effective Load-Regulation Error (Transconductance) FBN Line (IN) Regulation Error DRVN Source Current DRVN Off-Leakage Current Soft-Start Period Soft-Start Step Size POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES DEL Capacitor Charge Current DEL Turn-On Threshold DEL Discharge Switch On-Resistance CTL Input Low Voltage CTL Input High Voltage CTL Input Leakage Current CTL-to-SRC Propagation Delay SRC Input Voltage Range SRC Input Current SRC-to-COM Switch On-Resistance DRN-to-COM Switch On-Resistance ISRC RSRC(ON) RDRN(ON) VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND 200 115 5 30 VTH(DEL) During UVLO, VIN = 2.0V VIN = 2.5V to 5.5V VIN = 2.5V to 5.5V CTL = AGND or IN 2 -1 100 36 300 200 10 60 +1 During startup, VDEL = 1V 4 1.19 5 1.25 20 0.6 6 1.31 A V V V A ns V A tSS IDRVN IFBN SYMBOL VFBN CONDITIONS IDRVN = 100A, VREF - VFBN VFBN rising VFBN = 0.25V VDRVN = -10V, IDRVN = 50A to 1mA IDRVN = 0.1mA, 2.5V < VIN < 6V VFBN = 300mV, VDRVN = -10V VFBN = 0V, VDRVN = -25V 1 MIN 0.984 370 -50 11 0.7 5 -0.01 14 (VREF VFBN) / 128 -10 TYP 1 420 MAX 1.015 470 +50 25 5 UNITS V mV nA mV mV mA A ms V
GATE-OFF LINEAR-REGULATOR CONTROLLER
4
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TFT-LCD DC-DC Converter with Operational Amplifiers
ELECTRICAL CHARACTERISTICS
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = -40C to +85C, unless otherwise noted.) (Note 3)
PARAMETER IN Supply Range IN Undervoltage-Lockout Threshold SYMBOL VIN VUVLO (Note 2) VIN rising, typical hysteresis = 150mV VFB = VFBP = 1.3V, VFBN = 0V, LX not switching VFB = 1.2V, VFBP = 1.4V, VFBN = 0V, LX switching No external load Rising edge; typical hysteresis = 160mV 1.218 CONDITIONS MIN 2.5 2.05 MAX 6.0 2.45 1.0 mA 3 1.277 1.15 V V UNITS V V
MAX8795A
IN Quiescent Current
IIN
REF Output Voltage REF Undervoltage-Lockout Threshold MAIN STEP-UP REGULATOR Output Voltage Range Operating Frequency FB Regulation Voltage FB Line Regulation FB Transconductance LX On-Resistance LX Current Limit OPERATIONAL AMPLIFIERS SUP Supply Range SUP Overvoltage Fault Threshold SUP Supply Current Input Offset Voltage Input Common-Mode Voltage Range Output Voltage Swing, High Output Voltage Swing Low Short-Circuit Current ISUP VOS VCM VOH VOL VSUP RLX(ON) ILIM VMAIN fOSC VFB
VIN 900 No load VIN = 2.5V to 6V ICOMP = 2.5A ILX = 200mA VFB = 1.2V, duty cycle = 75% 2.5 6 18.0 Buffer configuration, VPOS_ = VSUP / 2, no load (VNEG_, VPOS_, IOUT_) = VSUP / 2 0 IOUT_ = 5mA IOUT_ = -5mA To VSUP / 2 Source Sink 75 75 1.210 VSUP 100 75 1.198
18 1400 1.260 0.4 280 260 3.5 18 19.9 5 12 VSUP
V kHz V %/ V S m A V V mA mV V mV
100 mA
GATE-ON LINEAR-REGULATOR CONTROLLER FBP Regulation Voltage FBP Effective Load-Regulation Error (Transconductance) FBP Line (IN) Regulation Error DRVP Sink Current IDRVP VFBP IDRVP = 100A VDRVP = 10V, IDRVP = 50A to 1mA IDRVP = 100A, 2.5V < VIN < 6V VFBP = 1.1V, VDRVP = 10V 1 1.280 -1.5 10 V % mV mA
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5
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = -40C to +85C, unless otherwise noted.) (Note 3)
PARAMETER FBN Regulation Voltage FBN Effective Load-Regulation Error (Transconductance) FBN Line (IN) Regulation Error DRVN Source Current DEL Capacitor Charge Current DEL Turn-On Threshold CTL Input Low Voltage CTL Input High Voltage SRC Input Voltage Range SRC Input Current SRC-to-COM Switch On-Resistance DRN-to-COM Switch On-Resistance ISRC RSRC(ON) RDRN(ON) VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND VTH(DEL) VIN = 2.5V to 5.5V VIN = 2.5V to 5.5V 2 36 300 200 10 60 IDRVN SYMBOL VFBN CONDITIONS IDRVN = 100A, VREF - VFBN VDRVN = -10V, IDRVN = 50A to 1mA IDRVN = 0.1mA, 2.5V < VIN < 6V VFBN = 300mV, VDRVN = -10V During startup, VDEL = 1V 1 4 1.19 6 1.31 0.6 MIN 0.972 MAX 1.022 25 5 UNITS V mV mV mA A V V V V A
GATE-OFF LINEAR-REGULATOR CONTROLLER
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
ELECTRICAL CHARACTERISTICS
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = 0C to +105C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER IN Supply Range IN Undervoltage-Lockout Threshold SYMBOL VIN VUVLO (Note 2) VIN rising, typical hysteresis = 50mV VFB = VFBP = 1.3V, VFBN = 0V, LX not switching IN Quiescent Current IIN VFB = 1.2V, VFBP = 1.4V, VFBN = 0V, LX switching VFB or FBP below threshold or FBN above threshold No external load 0 < ILOAD < 50A In regulation Rising edge, typical hysteresis = 160mV Temperature rising Hysteresis +160 15 10 1.15 TA = +25C to +105C TA = 0C to +105C 1.238 1.232 CONDITIONS MIN 2.5 2.05 2.25 0.6 2 200 1.250 1.250 1.262 1.266 10 TYP MAX 6.0 2.45 1.0 mA 3 ms V mV A V C UNITS V V
Duration-to-Trigger Fault Condition REF Output Voltage REF Load Regulation REF Sink Current REF Undervoltage-Lockout Threshold Thermal Shutdown
6
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TFT-LCD DC-DC Converter with Operational Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = 0C to +105C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER MAIN STEP-UP REGULATOR Output Voltage Range Operating Frequency Oscillator Maximum Duty Cycle FB Regulation Voltage FB Fault Trip Level FB Load Regulation FB Line Regulation FB Input Bias Current FB Transconductance FB Voltage Gain LX On-Resistance LX Leakage Current LX Current Limit Current-Sense Transresistance Soft-Start Period Soft-Start Step Size OPERATIONAL AMPLIFIERS SUP Supply Range SUP Overvoltage Fault Threshold SUP Supply Current Input Offset Voltage Input Bias Current Input Common-Mode Voltage Range Common-Mode Rejection Ratio Open-Loop Gain Output Voltage Swing, High Output Voltage Swing, Low Short-Circuit Current Power-Supply Rejection Ratio Slew Rate -3dB Bandwidth RL = 10k, CL = 10pF, buffer configuration PSRR VOH VOL IOUT_ = 5mA IOUT_ = -5mA To VSUP / 2, source or sink DC, 6V VSUP 18V, (VNEG_, VPOS_) VSUP / 2 75 60 45 20 VSUP 100 ISUP VOS IBIAS VCM CMRR 0 (VNEG_, VPOS_) VSUP Buffer configuration, VPOS_ = VSUP / 2, no load (VNEG_, VPOS_, VOUT_) VSUP / 2 (VNEG_, VPOS_, VOUT_) VSUP / 2 -50 0 45 80 125 VSUP 50 50 130 100 VSUP 6.0 18.0 19 3.5 0 0 18.0 19.9 5.0 12 +50 VSUP V mA mV nA V dB dB mV mV mA dB V/s MHz tSS RLX(ON) ILX ILIM VFB No load VFB falling 0 < IMAIN < full load, transient only VIN = 2.5V to 6V VFB = 1.233V ICOMP = 2.5A From FB to COMP ILX = 200mA VLX = 19V VFB = 1.2V, duty cycle = 75% 2.5 0.1 75 TA = +25C to +105C TA = 0C to +105C VMAIN fOSC VIN 1000 86 1.221 1.212 1.10 18 1200 90 1.233 1.233 1.14 -1 0.1 +100 160 700 160 10 3.0 0.2 14 VREF / 128 300 20 3.5 0.3 0.4 +200 280 %/V nA S V/V m A A V/A ms V 1400 93 1.245 1.248 1.17 V kHz % V V SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX8795A
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7
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = 0C to +105C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER FBP Regulation Voltage FBP Fault Trip Level FBP Input Bias Current FBP Effective Load-Regulation Error (Transconductance) FBP Line (IN) Regulation Error DRVP Sink Current DRVP Off-Leakage Current Soft-Start Period Soft-Start Step Size GATE-OFF LINEAR-REGULATOR CONTROLLER FBN Regulation Voltage FBN Fault Trip Level FBN Input Bias Current FBN Effective Load-Regulation Error (Transconductance) FBN Line (IN) Regulation Error DRVN Source Current DRVN Off-Leakage Current Soft-Start Period Soft-Start Step Size POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES DEL Capacitor Charge Current DEL Turn-On Threshold DEL Discharge Switch On-Resistance CTL Input Low Voltage CTL Input High Voltage CTL Input Leakage Current CTL-to-SRC Propagation Delay SRC Input Voltage Range SRC Input Current SRC-to-COM Switch On-Resistance DRN-to-COM Switch On-Resistance ISRC RSRC(ON) RDRN(ON) VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND 200 115 5 30 VTH(DEL) During UVLO, VIN = 2.0V VIN = 2.5V to 5.5V VIN = 2.5V to 5.5V CTL = AGND or IN 2 -1 100 36 300 200 12 70 +1 During startup, VDEL = 1V 4 1.19 5 1.25 20 0.6 6 1.31 A V V V A ns V A tSS IDRVN IFBN VFBN IDRVN = 100A, VREF - VFBN VFBN rising VFBN = 0.25V VDRVN = -10V, IDRVN = 50A to 1mA IDRVN = 0.1mA, 2.5V < VIN < 6V VFBN = 300mV, VDRVN = -10V VFBN = 0V, VDRVN = -25V 1 0.984 340 -50 11 0.7 5 -0.01 14 (VREF VFBN) / 128 -10 1 420 1.015 510 +50 25 5 V mV nA mV mV mA A ms V tSS IDRVP IFBP SYMBOL VFBP IDRVP = 100A VFBP falling VFBP = 1.25V VDRVP = 10V, IDRVP = 50A to 1mA IDRVP = 100A, 2.5V < VIN < 6V VFBP = 1.1V, VDRVP = 10V VFBP = 1.4V, VDRVP = 34V 1 CONDITIONS MIN 1.231 0.96 -50 -0.7 1 5 0.01 14 VREF / 128 10 TYP 1.250 1.00 MAX 1.269 1.04 +50 -1.5 10 UNITS V V nA % mV mA A ms V GATE-ON LINEAR-REGULATOR CONTROLLER
8
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TFT-LCD DC-DC Converter with Operational Amplifiers
ELECTRICAL CHARACTERISTICS
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = -40C to +105C, unless otherwise noted.) (Note3)
PARAMETER IN Supply Range IN Undervoltage-Lockout Threshold SYMBOL VIN VUVLO (Note 2) VIN rising, typical hysteresis = 150mV VFB = VFBP = 1.3V, VFBN = 0V, LX not switching IN Quiescent Current IIN VFB = 1.2V, VFBP = 1.4V, VFBN = 0V, LX switching No external load Rising edge, typical hysteresis = 160mV 1.218 CONDITIONS MIN 2.5 2.05 MAX 6.0 2.45 1.0 mA 3 1.277 1.15 V V UNITS V V
MAX8795A
REF Output Voltage REF Undervoltage-Lockout Threshold MAIN STEP-UP REGULATOR Output Voltage Range Operating Frequency FB Regulation Voltage FB Line Regulation FB Transconductance LX On-Resistance LX Current Limit OPERATIONAL AMPLIFIERS SUP Supply Range SUP Overvoltage Fault Threshold SUP Supply Current Input Offset Voltage Input Common-Mode Voltage Range Output Voltage Swing, High Output Voltage Swing, Low Short-Circuit Current ISUP VOS VCM VOH VOL VSUP RLX(ON) ILIM VMAIN fOSC VFB
VIN 900 No load VIN = 2.5V to 6V ICOMP = 2.5A ILX = 200mA VFB = 1.2V, duty cycle = 75% 2.5 6 18.0 Buffer configuration, VPOS_ = VSUP / 2, no load (VNEG_, VPOS_, VOUT_) VSUP / 2 0 IOUT_ = 5mA IOUT_ = -5mA To VSUP / 2 Source Sink 75 75 VSUP 100 75 1.198
18 1400 1.260 0.4 280 300 3.5 18 19.9 5 12 VSUP
V kHz V %/ V S m A V V mA mV V mV
100
mV mA
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9
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3V, VMAIN = VSUP = 14V, VPGND = VAGND = VBGND = 0V, IREF = 25A, TA = -40C to +105C, unless otherwise noted.) (Note3)
PARAMETER FBP Regulation Voltage FBP Effective Load-Regulation Error (Transconductance) FBP Line (IN) Regulation Error DRVP Sink Current FBN Regulation Voltage FBN Effective Load-Regulation Error (Transconductance) FBN Line (IN) Regulation Error DRVN Source Current DEL Capacitor Charge Current DEL Turn-On Threshold CTL Input Low Voltage CTL Input High Voltage SRC Input Voltage Range SRC Input Current SRC-to-COM Switch On-Resistance DRN-to-COM Switch On-Resistance ISRC RSRC(ON) RDRN(ON) VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND VTH(DEL) VIN = 2.5V to 5.5V VIN = 2.5V to 5.5V 2 36 300 200 12 70 IDRVN IDRVP VFBN SYMBOL VFBP IDRVP = 100A VDRVP = 10V, IDRVP = 50A to 1mA IDRVP = 100A, 2.5V < VIN < 6V VFBP = 1.1V, VDRVP = 10V IDRVN = 100A, VREF - VFBN VDRVN = -10V, IDRVN = 50A to 1mA IDRVN = 0.1mA, 2.5V < VIN < 6V VFBN = 300mV, VDRVN = -10V During startup, VDEL = 1V 1 4 1.19 6 1.31 0.6 1 0.972 1.022 25 5 CONDITIONS MIN 1.210 MAX 1.280 -1.5 10 UNITS V % mV mA V mV mV mA A V V V V A
GATE-ON LINEAR-REGULATOR CONTROLLER
GATE-OFF LINEAR-REGULATOR CONTROLLER
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
Note 2: For 5.5V < VIN < 6.0V, use MAX8795A for no longer than 1% of IC lifetime. For continuous operation, input voltage should not exceed 5.5V. Note 3: Specifications to -40C and +105C are guaranteed by design, not production tested.
10
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TFT-LCD DC-DC Converter with Operational Amplifiers
Typical Operating Characteristics
(Circuit of Figure 1, VIN = 5V, VMAIN = 14V, VGON = 25V, VGOFF = -10V, TA = +25C, unless otherwise noted.)
STEP-UP EFFICIENCY vs. LOAD CURRENT
MAX9795A toc01
MAX8795A
SWITCHING FREQUENCY vs. INPUT VOLTAGE
MAX9795A toc02
STEP-UP SUPPLY CURRENT vs. SUPPLY VOLTAGE
NO LOAD, SUP DISCONNECTED, R1 = 221k, R2 = 21.5k
MAX8795A toc03
90
1.4 SWITCHING FREQUENCY (MHz)
18 15 SUPPLY CURRENT (mA) 12 9 6 CURRENT INTO IN PIN 3
85 EFFICIENCY (%)
1.3
CURRENT INTO INDUCTOR
80
1.2
75 VIN = 5V VMAIN = 13.9V 70 1 10 100 1000 LOAD CURRENT (mA)
1.1
1.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V)
0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V)
STEP-UP REGULATOR SOFT-START (HEAVY LOAD)
MAX8795A toc04
STEP-UP REGULATOR PULSED LOAD-TRANSIENT RESPONSE
MAX8795A toc05
TIMER-DELAYED OVERLOAD PROTECTION
MAX8795A toc06
A 0V B
A 50mA 13.9V B A
0V C 0A
B C 0A 10s/div A: LOAD CURRENT, 1A/div B: VMAIN, 200mV/div, AC-COUPLED C: INDUCTOR CURRENT, 1A/div 0A 0U 40ms/div A: VMAIN, 2V/div B: INDUCTOR CURRENT, 1A/div
2ms/div A: VIN, 5V/div B: VMAIN, 5V/div C: INDUCTOR CURRENT, 1A/div
REF VOLTAGE LOAD REGULATION
MAX8795A toc07
GATE-ON REGULATOR LINE REGULATION
MAX8795A toc08
GATE-ON REGULATOR LOAD REGULATION
MAX8795A toc09
1.2500 1.2495 REF VOLTAGE (V) 1.2490 1.2485 1.2480 1.2475 1.2470 0 10 20 30 40
0
VOLTAGE ERROR (%)
-0.4
VOLTAGE ERROR (%)
-0.2
-0.1
-0.3
-0.6
-0.8
IPOS = 20mA 25 26 27 28 29 30
-0.5 0 5 10
IBOOST = 200mA
50
15
20
LOAD CURRENT (A)
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
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11
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 5V, VMAIN = 14V, VGON = 25V, VGOFF = -10V, TA = +25C, unless otherwise noted.)
GATE-OFF REGULATOR LINE REGULATION
MAX8795A toc10
GATE-OFF REGULATOR LOAD REGULATION
MAX8795A toc11
POWER-UP SEQUENCE
MAX8795A toc12
0.4 0.2 VOLTAGE ERROR (%) 0 -0.2 -0.4 -0.6 -0.8 INEG = 50mA -1.0 -16 -14 -12
0.2 0 VOLTAGE ERROR (%) -0.2 -0.4 -0.6 -0.8 -1.0
IBOOST = 0mA
A 0V B 0V 0V C D 0V
-10
0
10
20
30
40
50 A: VMAIN, 10V/div B: VPOS, 20V/div
4ms/div C: VNEG, 10V/div D: VCOM, 20V/div
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
SUP SUPPLY CURRENT vs. SUP VOLTAGE
MAX8795A toc13
OPERATIONAL-AMPLIFIER RAIL-TO-RAIL INPUT/OUTPUT
MAX8795A toc14
3.6 3.5 3.4 ISUP (mA) 3.3 3.2 3.1 3.0 2.9 2.8 6 8 10 12 VSUP (V) 14 16
VSUP = 15V
A
0V B
0V
18
4s/div A: INPUT SIGNAL, 5V/div B: OUTPUT SIGNAL, 5V/div
12
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TFT-LCD DC-DC Converter with Operational Amplifiers
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 5V, VMAIN = 14V, VGON = 25V, VGOFF = -10V, TA = +25C, unless otherwise noted.)
MAX8795A
OPERATIONAL-AMPLIFIER LOAD-TRANSIENT RESPONSE
MAX8795A toc15
OPERATIONAL-AMPLIFIER LARGE-SIGNAL RESPONSE
MAX8795A toc16
OPERATIONAL-AMPLIFIER SMALL-SIGNAL RESPONSE
MAX8795A toc17
VSUP = 15V A 0V A A 0V 0V +50mA B 0mA -50mA 0V 400ns/div A: OUTPUT VOLTAGE, 1V/div, AC-COUPLED B: OUTPUT CURRENT, 50mA/div 1s/div A: INPUT SIGNAL, 5V/div B: OUTPUT SIGNAL, 5V/div 400ns/div A: INPUT SIGNAL, 100mV/div B: OUTPUT SIGNAL, 100mV/div
B
B 0V
Pin Description
PIN 1 2 3 NAME SRC REF AGND FUNCTION Switch Input. Source of the internal high-voltage p-channel MOSFET. Bypass SRC to PGND with a minimum 0.1F capacitor close to the pins. Reference Bypass Terminal. Bypass REF to AGND with a minimum of 0.22F close to the pins. Analog Ground for Step-Up Regulator and Linear Regulators. Connect to power ground (PGND) underneath the IC. Power Ground. PGND is the source of the main step-up n-channel power MOSFET. Connect PGND to the output-capacitor ground terminals through a short, wide PCB trace. Connect to analog ground (AGND) underneath the IC. Operational-Amplifier 1 Output Operational-Amplifier 1 Inverting Input Operational-Amplifier 1 Noninverting Input Operational-Amplifier 2 Output Operational-Amplifier 2 Inverting Input Operational-Amplifier 2 Noninverting Input Analog Ground for Operational Amplifiers. Connect to power ground (PGND) underneath the IC. Operational-Amplifier 3 Noninverting Input Operational-Amplifier 3 Output Operational-Amplifier Power Input. Positive supply rail for the operational amplifiers. Typically connected to VMAIN. Bypass SUP to BGND with a 0.1F capacitor. Operational-Amplifier 4 Noninverting Input Operational-Amplifier 4 Inverting Input
4 5 6 7 8 9 10 11 12 13 14 15 16
PGND OUT1 NEG1 POS1 OUT2 NEG2 POS2 BGND POS3 OUT3 SUP POS4 NEG4
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13
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
Pin Description (continued)
PIN 17 18 19 20 21 22 23 24 NAME OUT4 POS5 NEG5 OUT5 LX IN FB COMP Operational-Amplifier 4 Output Operational-Amplifier 5 Noninverting Input Operational-Amplifier 5 Inverting Input Operational-Amplifier 5 Output n-Channel Power MOSFET Drain and Switching Node. Connect the inductor and Schottky diode to LX and minimize the trace area for lowest EMI. Supply Voltage Input. IN can range from 2.5V to 6V. Step-Up Regulator Feedback Input. Regulates to 1.233V (nominal). Connect a resistive voltage-divider from the output (VMAIN) to FB to analog ground (AGND). Place the divider within 5mm of FB. Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC from COMP to AGND. See the Loop Compensation section for component selection guidelines. Gate-On Linear-Regulator Feedback Input. FBP regulates to 1.25V (nominal). Connect FBP to the center of a resistive voltage-divider between the regulator output and AGND to set the gate-on linearregulator output voltage. Place the resistive voltage-divider within 5mm of FBP. Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channel MOSFET. Connect DRVP to the base of an external pnp pass transistor. See the Pass-Transistor Selection section. Gate-Off Linear-Regulator Feedback Input. FBN regulates to 250mV (nominal). Connect FBN to the center of a resistive voltage-divider between the regulator output and REF to set the gate-off linearregulator output voltage. Place the resistive voltage-divider within 5mm of FBN. Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channel MOSFET. Connect DRVN to the base of an external npn pass transistor. See the Pass-Transistor Selection section. High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to set the high-voltage switch startup delay. High-Voltage Switch Control Input. When CTL is high, the high-voltage switch between COM and SRC is on and the high-voltage switch between COM and DRN is off. When CTL is low, the high-voltage switch between COM and SRC is off and the high-voltage switch between COM and DRN is on. CTL is inhibited by the undervoltage lockout or when the voltage on DEL is less than 1.25V. Switch Input. Drain of the internal high-voltage back-to-back p-channel MOSFETs connected to COM. Internal High-Voltage MOSFET Switch Common Terminal. Do not allow the voltage on COM to exceed VSRC. Exposed Paddle. Must be connected to AGND. Do not use as the only ground connection. FUNCTION
25
FBP
26
DRVP
27
FBN
28 29
DRVN DEL
30
CTL
31 32 --
DRN COM EP
14
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TFT-LCD DC-DC Converter with Operational Amplifiers
Typical Operating Circuit
The MAX8795A typical operating circuit (Figure 1) is a complete power-supply system for TFT LCDs. The circuit generates a +14V source-driver supply and +25V and
L1 3.0H C1 22F LX D1 R1 137k 1% FB R2 13.3k 1% COMP C11 0.1F C12 220F R9 6.8k D3 C10 0.1F Q2 R7 324k 1% R8 31.6k 1% REF C8 0.22F DRVN FBP FBN C9 0.22F R5 10.0k 1% SRC COM DRN CTL DEL C7 0.033F NEG1 OUT1 NEG2 OUT2 TO VCOM BACKPLANE OUT3 NEG4 OUT4 NEG5 OUT5 EP POS1 POS2 POS3 POS4 POS5 R20 100k R18 100k R16 100k R14 100k R12 100k SUP C6 0.1F BGND R19 100k R17 100k R15 100k R13 100k R11 100k R6 1k R4 191k 1% C5 0.47F AGND PGND C4 0.1F C14 68pF C2 22F C3 0.1F VMAIN 14V/500mA
-10V gate-driver supplies. The input voltage range for the IC is from +2.5V to +5.5V. The listed load currents in Figure 1 are available from a +4.5V to +5.5V supply. Table 1 lists some recommended components, and Table 2 lists the contact information of component suppliers.
MAX8795A
VIN 4.5V TO 5.5V
R10 10 IN C13 0.1F 180k
LX
LX
D2
LX
MAX8795A
DRVP
R3 6.8k
Q1
VGOFF -10V/50mA
VGON 25V/20mA
Figure 1. Typical Operating Circuit
Table 1. Component List
DESIGNATION C1 C2 D1 D2, D3 DESCRIPTION 22F, 6.3V X5R ceramic capacitor (1210) TDK C3225X5R0J227M 22F, 16V X5R ceramic capacitor (1812) TDK C4532X5X1C226M 3A, 30V Schottky diode (M-flat) Toshiba CMS02 200mA, 100V, dual ultra-fast diodes (SOT23) Fairchild MMBD4148SE DESIGNATION L1 Q1 Q2 DESCRIPTION 3.0H, 3A inductor Sumida CDRH6D28-3R0 200mA, 40V pnp bipolar transistor (SOT23) Fairchild MMBT3906 200mA, 40V npn bipolar transistor (SOT23) Fairchild MMBT3904
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15
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
Table 2. Component Suppliers
SUPPLIER Fairchild Sumida TDK Toshiba PHONE 408-822-2000 847-545-6700 847-803-6100 949-455-2000 FAX 408-822-2102 847-545-6720 847-390-4405 949-859-3963 WEBSITE www.fairchildsemi.com www.sumida.com www.component.tdk.com www.toshiba.com/taec
VCN
VCP
Detailed Description
VMAIN
VIN LX IN STEP-UP CONTROLLER PGND AGND FB
The MAX8795A contains a high-performance step-up switching regulator, two low-cost linear-regulator controllers, multiple high-current operational amplifiers, and startup timing and level-shifting functionality useful for active-matrix TFT LCDs. Figure 2 shows the MAX8795A functional diagram.
Main Step-Up Regulator
COMP VCP
MAX8795A
DRVP GATE-ON CONTROLLER FBP VGON
SRC DEL COM SWITCH CONTROL CTL VCN DRN
DRVN GATE-OFF CONTROLLER VGOFF
The main step-up regulator employs a current-mode, fixed-frequency PWM architecture to maximize loop bandwidth and provide fast transient response to pulsed loads typical of TFT-LCD panel source drivers. The 1.2MHz switching frequency allows the use of lowprofile inductors and ceramic capacitors to minimize the thickness of LCD panel designs. The integrated high-efficiency MOSFET and the IC's built-in digital soft-start functions reduce the number of external components required while controlling inrush currents. The output voltage can be set from VIN to 18V with an external resistive voltage-divider. The regulator controls the output voltage and the power delivered to the output by modulating the duty cycle (D) of the internal power MOSFET in each switching cycle. The duty cycle of the MOSFET is approximated by: V -V D MAIN IN VMAIN Figure 3 shows the functional diagram of the step-up regulator. An error amplifier compares the signal at FB to 1.233V and changes the COMP output. The voltage at COMP sets the peak inductor current. As the load varies, the error amplifier sources or sinks current to the COMP output accordingly to produce the inductor peak current necessary to service the load. To maintain stability at high duty cycles, a slope-compensation signal is summed with the current-sense signal. On the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel MOSFET and applying the input voltage across the inductor. The current through the inductor ramps up linearly, storing energy in its magnetic field. Once the sum of the current-feedback signal and the slope compensation exceeds the COMP
SUP NEG1
FBN OUT1 OP1 REF NEG4
POS1 NEG2
REF
OUT2
OP2
OP4
OUT4
POS2
POS4 NEG5
OUT3
OP3
OP5
OUT5
POS3 EP BGND
POS5
Figure 2. MAX8795A Functional Diagram
16
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TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
LX RESET DOMINANT CLOCK S R ILIM COMPARATOR Q PGND
VMAIN
FROM CHARGE-PUMP OUTPUT
DRVP npn CASCODE TRANSISTOR
pnp PASS TRANSISTOR VGON
MAX8795A
SOFTSTART
VLIMIT
FBP
SLOPE COMP PWM COMPARATOR
CURRENT SENSE
OSCILLATOR FAULT COMPARATOR
Figure 4. Using Cascoded npn for Charge-Pump Output Voltages > 36V
LX
TO FAULT LATCH 1.14V ERROR AMP FB
0.1F
0.1F VMAIN 14V
68pF
1.233V COMP
6.8k DRVP Q1
Figure 3. Step-Up Regulator Functional Diagram
VGON 35V
voltage, the controller resets the flip-flop and turns off the MOSFET. Since the inductor current is continuous, a transverse potential develops across the inductor that turns on the diode (D1). The voltage across the inductor then becomes the difference between the output voltage and the input voltage. This discharge condition forces the current through the inductor to ramp back down, transferring the energy stored in the magnetic field to the output capacitor and the load. The MOSFET remains off for the rest of the clock cycle.
MAX8795A
47pF FBP 150pF
0.47F 274k 1%
0.22F
10.2k 1%
Figure 5. The linear regulator controls the intermediate chargepump stage.
Gate-On Linear-Regulator Controller, REG P
The gate-on linear-regulator controller (REG P) is an analog gain block with an open-drain n-channel output. It drives an external pnp pass transistor with a 6.8k base-to-emitter resistor (Figure 1). Its guaranteed basedrive sink current is at least 1mA. The regulator including Q1 in Figure 1 uses a 0.47F ceramic output capacitor and is designed to deliver 20mA at 25V. Other output voltages and currents are possible with the proper pass transistor and output capacitor. See the Pass-Transistor Selection and Stability Requirements sections.
REG P is typically used to provide the TFT-LCD gate drivers' gate-on voltage. Use a charge pump with as many stages as necessary to obtain a voltage exceeding the required gate-on voltage (see the Selecting the Number of Charge-Pump Stages section). Note the voltage rating of DRVP is 36V. If the charge-pump output voltage can exceed 36V, an external cascode npn transistor should be added as shown in Figure 4. Alternately, the linear regulator can control an intermediate charge-pump stage while regulating the final charge-pump output (Figure 5).
17
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TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
REG P is enabled after the REF voltage exceeds 1.0V. Each time it is enabled, the controller goes through a soft-start routine that ramps up its internal reference DAC in 128 steps. As the operational amplifier's capacitive load increases, the amplifier's bandwidth decreases and gain peaking increases. A 5 to 50 small resistor placed between OUT_ and the capacitive load reduces peaking, but also reduces the gain. An alternative method of reducing peaking is to place a series RC network (snubber) in parallel with the capacitive load. The RC network does not continuously load the output or reduce the gain. Typical values of the resistor are between 100 and 200, and the typical value of the capacitor is 10nF.
Gate-Off Linear-Regulator Controller, REG N
The gate-off linear-regulator controller (REG N) is an analog gain block with an open-drain p-channel output. It drives an external npn pass transistor with a 6.8k base-to-emitter resistor (Figure 1). Its guaranteed basedrive source current is at least 1mA. The regulator including Q2 in Figure 1 uses a 0.47F ceramic output capacitor and is designed to deliver 50mA at -10V. Other output voltages and currents are possible with the proper pass transistor and output capacitor (see the PassTransistor Selection and Stability Requirements sections). REG N is typically used to provide the TFT-LCD gate drivers' gate-off voltage. A negative voltage can be produced using a charge-pump circuit as shown in Figure 1. REG N is enabled after the voltage on REF exceeds 1.0V. Each time it is enabled, the control goes through a soft-start routine that ramps down its internal reference DAC from VREF to 250mV in 128 steps.
Undervoltage Lockout (UVLO)
The UVLO circuit compares the input voltage at IN with the UVLO threshold (2.25V rising, 2.20V falling, typ) to ensure the input voltage is high enough for reliable operation. The 50mV (typ) hysteresis prevents supply transients from causing a restart. Once the input voltage exceeds the UVLO rising threshold, startup begins. When the input voltage falls below the UVLO falling threshold, the controller turns off the main step-up regulator, turns off the linearregulator outputs, and disables the switch control block; the operational-amplifier outputs are high impedance.
Reference Voltage (REF)
The reference output is nominally 1.25V and can source at least 50A (see the Typical Operating Characteristics). Bypass REF with a 0.22F ceramic capacitor connected between REF and AGND.
Operational Amplifiers
The MAX8795A has five operational amplifiers. The operational amplifiers are typically used to drive the LCD backplane (VCOM) or the gamma-correction divider string. They feature 130mA output short-circuit current, 45V/s slew rate, and 20MHz/3dB bandwidth. The rail-to-rail input and output capability maximizes system flexibility.
Power-Up Sequence and Soft-Start
Once the voltage on IN exceeds approximately 2.25V, the reference turns on. With a 0.22F REF bypass capacitor, the reference reaches its regulation voltage of 1.25V in approximately 1ms. When the reference voltage exceeds 1.0V, the IC enables the main step-up regulator, the gateon linear-regulator controller, and the gate-off linear-regulator controller simultaneously. The IC employs soft-start for each regulator to minimize inrush current and voltage overshoot and to ensure a welldefined startup behavior. Each output uses a 7-bit soft-start DAC. For the step-up and the gate-on linear regulator, the DAC output is stepped in 128 steps from zero up to the reference voltage. For the gate-off linear regulator, the DAC output steps from the reference down to 250mV in 128 steps from zero up to the reference voltage. For the gateoff linear regulator's voltage ramp soft-start, the DAC output steps from the reference down to 250mV in 128 steps. The soft-start duration is 14ms (typ) for all three regulators, and DEL remains pulled down to AGND during the soft start period. Once the main step-up regulator, the gate-on linear-regulator controller, and the gate-off linear-regulator controller reach regulation, a 5A current source starts charging
Short-Circuit Current Limit and Input Clamp The operational amplifiers limit short-circuit current to approximately 130mA if the output is directly shorted to SUP or to BGND. If the short-circuit condition persists, the junction temperature of the IC rises until it reaches the thermal-shutdown threshold (+160C typ). Once the junction temperature reaches the thermal-shutdown threshold, an internal thermal sensor immediately sets the thermal fault latch, shutting off all the IC's outputs. The device remains inactive until the input voltage is cycled. The operational amplifiers have 4V input clamp structures in series with a 500 resistance and a diode (Figure 2). Driving Pure Capacitive Load The operational amplifiers are typically used to drive the LCD backplane (VCOM) or the gamma-correction divider string. The LCD backplane consists of a distributed series capacitance and resistance, a load that can be easily driven by the operational amplifier. However, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation.
18
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TFT-LCD DC-DC Converter with Operational Amplifiers
VIN 2.25V 1.05V VREF
VMAIN
CDEL. Once the CDEL capacitor voltage exceeds 1.25V (typ), the switch-control block is and op amps are enabled as shown in Figure 6. After the switch-control block is enabled, COM can be connected to SRC or DRN through the internal p-channel switches, depending upon the state of CTL. Before startup and when IN is less than VUVLO, DEL is internally connected to AGND to discharge CDEL. Select CDEL to set the initial start-up delay and the switch-control block startup delay times using the following equation: CDEL = DELAY _ TIME x I6A 1.25V
MAX8795A
VGON
Switch-Control Block
12ms INPUT SOFT- SOFTVOLTAGE START START OK BEGINS ENDS 1.25V SWITCH CONTROL ENABLED VGOFF VDEL
The switch-control input (CTL) is not activated until all four of the following conditions are satisfied: the input voltage exceeds VUVLO, the soft-start routine of all the regulators is complete, there is no fault condition detected, and VDEL exceeds its turn-on threshold. Once activated and if CTL is high, the 5 internal p-channel switch (Q1) between COM and SRC turns on and the
Figure 6. Power-Up Sequence
IN
MAX8795A
5A 2.25V FB OK FBP OK FBN OK SRC
Q1 DEL
REF COM
CTL
Q2
DRN
Figure 7. Switch-Control Block
______________________________________________________________________________________ 19
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
30 p-channel switch (Q2) between DRN and COM turns off. If CTL is low, Q1 turns off and Q2 turns on.
Fault Protection
During steady-state operation, if the output of the main regulator or any of the linear-regulator outputs does not exceed its respective fault-detection threshold, the MAX8795A activates an internal fault timer. If any condition or combination of conditions indicates a continuous fault for the fault-timer duration (200ms typ), the MAX8795A sets the fault latch to shut down all the outputs except the reference. Once the fault condition is removed, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device. The faultdetection circuit is disabled during the soft-start time.
average DC inductor current at the full load current. The best trade-off between inductor size and circuit efficiency for step-up regulators generally has an LIR between 0.3 and 0.6. However, depending on the AC characteristics of the inductor core material and ratio of inductor resistance to other power-path resistances, the best LIR can shift up or down. If the inductor resistance is relatively high, more ripple can be accepted to reduce the number of turns required and increase the wire diameter. If the inductor resistance is relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. If extremely thin high-resistance inductors are used, as is common for LCD-panel applications, the best LIR can increase to between 0.5 and 1.0. Once a physical inductor is chosen, higher and lower values of the inductor should be evaluated for efficiency improvements in typical operating regions. Calculate the approximate inductor value using the typical input voltage (VIN), the maximum output current (IMAIN(MAX)), the expected efficiency (TYP) taken from an appropriate curve in the Typical Operating Characteristics section, and an estimate of LIR based on the above discussion: V 2 VMAIN - VIN TYP L = IN VMAIN IMAIN(MAX) x fOSC LIR Choose an available inductor value from an appropriate inductor family. Calculate the maximum DC input current at the minimum input voltage (VIN(MIN)) using conservation of energy and the expected efficiency at that operating point (MIN) taken from the appropriate curve in the Typical Operating Characteristics: IIN(DCMAX) = , IMAIN(MAX) x VMAIN VIN(MIN) x MIN
Thermal-Overload Protection
Thermal-overload protection prevents excessive power dissipation from overheating the MAX8795A. When the junction temperature exceeds +160C, a thermal sensor immediately activates the fault protection, which shuts down all outputs except the reference, allowing the device to cool down. Once the device cools down by approximately 15C, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device. The thermal-overload protection protects the controller in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature rating of +150C.
Design Procedure
Main Step-Up Regulator
Inductor Selection The minimum inductance value, peak current rating, and series resistance are factors to consider when selecting the inductor. These factors influence the converter's efficiency, maximum output load capability, transient-response time, and output voltage ripple. Size and cost are also important factors to consider.
The maximum output current, input voltage, output voltage, and switching frequency determine the inductor value. Very high inductance values minimize the current ripple, and therefore, reduce the peak current, which decreases core losses in the inductor and conduction losses in the entire power path. However, large inductor values also require more energy storage and more turns of wire, which increase size and can increase conduction losses in the inductor. Low inductance values decrease the size, but increase the current ripple and peak current. Finding the best inductor involves choosing the best compromise between circuit efficiency, inductor size, and cost. The equations used here include a constant LIR, which is the ratio of the inductor peak-to-peak ripple current to the
20
Calculate the ripple current at that operating point and the peak current required for the inductor: IRIPPLE = VIN(MIN) x (VMAIN - VIN(MIN) ) L x VMAIN x fOSC I IPEAK = IIN(DCMAX) + RIPPLE , 2 The inductor's saturation current rating and the MAX8795A's LX current limit (ILIM) should exceed IPEAK, and the inductor's DC current rating should exceed IIN(DC,MAX). For good efficiency, choose an inductor with less than 0.1 series resistance. Considering the typical operating circuit, the maximum load current (IMAIN(MAX)) is 500mA with a 14V output and
______________________________________________________________________________________
TFT-LCD DC-DC Converter with Operational Amplifiers
a typical input voltage of 5V. Choosing an LIR of 0.5 and estimating efficiency of 85% at this operating point: 5V 2 14V - 5V 0.85 L= 3.3H 14V 0.5A x 1.2 MHz 0.5 Using the circuit's minimum input voltage (4.5V) and estimating efficiency of 80% at that operating point: 0.5A x 14V I IN(DCMAX) = 1.94A , 4.5V x 0.8 The ripple current and the peak current are: 4.5V x (14V - 4.5V) I RIPPLE = 0.77A 3.3H x 14V x 1.2 MHz 0.77A I PEAK = 1.94A + 2.33A 2 be tolerated on CIN if IN is decoupled from CIN using an RC lowpass filter (see R10 and C13 in Figure 1).
MAX8795A
Rectifier Diode The MAX8795A's high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. In general, a 2A Schottky diode complements the internal MOSFET well. Output-Voltage Selection The output voltage of the main step-up regulator can be adjusted by connecting a resistive voltage-divider from the output (VMAIN) to AGND with the center tap connected to FB (see Figure 1). Select R2 in the 10k to 50k range. Calculate R1 with the following equation:
V R1 = R2 x MAIN - 1 VFB where VFB, the step-up regulator's feedback set point, is 1.233V. Place R1 and R2 close to the IC.
Output-Capacitor Selection The total output voltage ripple has two components: the capacitive ripple caused by the charging and discharging of the output capacitance, and the ohmic ripple due to the capacitor's equivalent series resistance (ESR): VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR)
V I - VIN VRIPPLE(C) MAIN MAIN COUT VMAINfOSC and : VRIPPLE(ESR) IPEAKR ESR(COUT) where IRIPPLE is the RIPPLE inductor current (see the Inductor Selection section). For ceramic capacitors, the output voltage ripple is typically dominated by VRIPPLE(C). The voltage rating and temperature characteristics of the output capacitor must also be considered.
Loop Compensation Choose RCOMP to set the high-frequency integrator gain for fast transient response. Choose CCOMP to set the integrator zero to maintain loop stability. For low-ESR output capacitors, use the following equations to obtain stable performance and good transient response:
RCOMP CCOMP 253 x VIN x VOUT x COUT L x I MAIN(MAX) VOUT x COUT 10 x I MAIN(MAX) x RCOMP
Input-Capacitor Selection The input capacitor (CIN) reduces the current peaks drawn from the input supply and reduces noise injection into the IC. A 22F ceramic capacitor is used in the typical applications circuit (Figure 1) because of the high source impedance seen in typical lab setups. Actual applications usually have much lower source impedance since the step-up regulator often runs directly from the output of another regulated supply. Typically, CIN can be reduced below the values used in the typical applications circuit. Ensure a low-noise supply at IN by using adequate CIN. Alternately, greater voltage variation can
To further optimize transient response, vary RCOMP in 20% steps and CCOMP in 50% steps while observing transient-response waveforms.
Charge Pumps
Selecting the Number of Charge-Pump Stages For highest efficiency, always choose the lowest number of charge-pump stages that meet the output requirement. Figures 8 and 9 show the positive and negative charge-pump output voltages for a given VMAIN for one-, two-, and three-stage charge pumps.
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21
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
The number of positive charge-pump stages is given by: V +V -V nPOS = GON DROPOUT MAIN VMAIN - 2 x VD where nPOS is the number of positive charge-pump stages, VGON is the gate-on linear-regulator REG P output, VMAIN is the main step-up regulator output, VD is
POSITIVE CHARGE-PUMP OUTPUT VOLTAGE vs. VMAIN
60 VD = 0.3V TO 1V 50 40 G_ON (V) 2-STAGE CHARGE PUMP 30 20 10 1-STAGE CHARGE PUMP 0 2 4 6 8 VMAIN (V) 10 12 14 3-STAGE CHARGE PUMP
the forward-voltage drop of the charge-pump diode, and VDROPOUT is the dropout margin for the linear regulator. Use VDROPOUT = 0.3V. The number of negative charge-pump stages is given by: nNEG = -VGOFF + VDROPOUT VMAIN - 2 x VD
where nNEG is the number of negative charge-pump stages, VGOFF is the gate-off linear-regulator REG N output, VMAIN is the main step-up regulator output, VD is the forward-voltage drop of the charge-pump diode, and VDROPOUT is the dropout margin for the linear regulator. Use VDROPOUT = 0.3V. The above equations are derived based on the assumption that the first stage of the positive charge pump is connected to VMAIN and the first stage of the negative charge pump is connected to ground. Sometimes fractional stages are more desirable for better efficiency. This can be done by connecting the first stage to VIN or another available supply. If the first charge-pump stage is powered from VIN, the above equations become: V +V +V nPOS = GON DROPOUT IN VMAIN - 2 x VD -V + VDROPOUT + VIN nNEG = GOFF VMAIN - 2 x VD
Figure 8. Positive Charge-Pump Output Voltage vs. VMAIN
NEGATIVE CHARGE-PUMP OUTPUT VOLTAGE vs. VMAIN
-0 -5 -10 -15 G_OFF (V) -20 -25 -30 -35 -40 -45 2 4 6 8 VMAIN (V) 10 12 14 2-STAGE CHARGE PUMP 3-STAGE CHARGE PUMP VD = 0.3V TO 1V 1-STAGE CHARGE PUMP
Flying Capacitors Increasing the flying-capacitor (CX) value lowers the effective source impedance and increases the outputcurrent capability. Increasing the capacitance indefinitely has a negligible effect on output-current capability because the internal switch resistance and the diode impedance place a lower limit on the source impedance. A 0.1F ceramic capacitor works well in most low-current applications. The flying capacitor's voltage rating must exceed the following:
VCX > n x VMAIN where n is the stage number in which the flying capacitor appears, and VMAIN is the output voltage of the main step-up regulator.
Figure 9. Negative Charge-Pump Output Voltage vs. VMAIN
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TFT-LCD DC-DC Converter with Operational Amplifiers
Charge-Pump Output Capacitor Increasing the output capacitance or decreasing the ESR reduces the output ripple voltage and the peak-topeak transient voltage. With ceramic capacitors, the output voltage ripple is dominated by the capacitance value. Use the following equation to approximate the required capacitor value:
COUT _ CP ILOAD _ CP 2fOSC VRIPPLE _ CP voltage, and power dissipation. The transistor's current gain limits the guaranteed maximum output current to: V ILOAD(MAX) = IDRV - BE x hFE(MIN) RBE where IDRV is the minimum guaranteed base-drive current, VBE is the transistor's base-to-emitter forward voltage drop, and RBE is the pullup resistor connected between the transistor's base and emitter. Furthermore, the transistor's current gain increases the linear regulator's DC loop gain (see the Stability Requirements section), so excessive gain destabilizes the output. Therefore, transistors with current gain over 100 at the maximum output current can be difficult to stabilize and are not recommended unless the high gain is needed to meet the load-current requirements. The transistor's saturation voltage at the maximum output current determines the minimum input-to-output voltage differential that the linear regulator can support. Also, the package's power dissipation limits the usable maximum input-to-output voltage differential. The maximum power-dissipation capability of the transistor's package and mounting must exceed the actual power dissipated in the device. The power dissipated equals the maximum load current (ILOAD(MAX)_LR) multiplied by the maximum input-to-output voltage differential: P = ILOAD(MAX)_ LR x (VIN(MAX)_ LR - VOUT _ LR ) where VIN(MAX)_LR is the maximum input voltage of the linear regulator, and VOUT_LR is the output voltage of the linear regulator.
MAX8795A
where COUT_CP is the output capacitor of the charge pump, I LOAD_CP is the load current of the charge pump, and VRIPPLE_CP is the peak-to-peak value of the output ripple.
Charge-Pump Rectifier Diodes Use low-cost silicon switching diodes with a current rating equal to or greater than two times the average charge-pump input current. If it helps avoid an extra stage, some or all of the diodes can be replaced with Schottky diodes with an equivalent current rating.
Linear-Regulator Controllers
Output-Voltage Selection Adjust the gate-on linear-regulator (REG P) output voltage by connecting a resistive voltage-divider from the REG P output to AGND with the center tap connected to FBP (Figure 1). Select the lower resistor of the divider R5 in the range of 10k to 30k. Calculate the upper resistor R4 with the following equation:
V R4 = R5 x GON - 1 VFBP where VFBP = 1.25V (typ). Adjust the gate-off linear-regulator REG N output voltage by connecting a resistive voltage-divider from VGOFF to REF with the center tap connected to FBN (Figure 1). Select R8 in the 20k to 50k range. Calculate R7 with the following equation: V -V R7 = R8 x FBN GOFF VREF - VFBN where VFBN = 250mV, VREF = 1.25V. Note that REF can only source up to 50A; using a resistor less than 20k for R8 results in higher bias current than REF can supply.
Stability Requirements The MAX8795A linear-regulator controllers use an internal transconductance amplifier to drive an external pass transistor. The transconductance amplifier, the pass transistor, the base-emitter resistor, and the output capacitor determine the loop stability. The following applies to both linear-regulator controllers in the MAX8795A.
The transconductance amplifier regulates the output voltage by controlling the pass transistor's base current. The total DC loop gain is approximately: 10 I xh A V _ LR x 1 + BIAS FE x VREF VT ILOAD _ LR where VT is 26mV at room temperature, and IBIAS is the current through the base-to-emitter resistor (RBE). For the MAX8795A, the bias currents for both the gate-on
23
Pass-Transistor Selection The pass transistor must meet specifications for current gain (hFE), input capacitance, collector-emitter saturation
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TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
and gate-off linear-regulator controllers are 0.1mA. Therefore, the base-to-emitter resistor for both linear regulators should be chosen to set 0.1mA bias current: RBE = 0.7V VBE = 6.8k 0.1mA 0.1mA 4) Next, calculate the pole set by the linear regulator's feedback resistance and the capacitance between FB_ and AGND (including stray capacitance): fPOLE _ FB = 1 2 x CFB x (RUPPER || RLOWER )
The output capacitor and the load resistance create the dominant pole in the system. However, the internal amplifier delay, pass transistor's input capacitance, and the stray capacitance at the feedback node create additional poles in the system, and the output capacitor's ESR generates a zero. For proper operation, use the following equations to verify the linear regulator is properly compensated: 1) First, determine the dominant pole set by the linear regulator's output capacitor and the load resistor: I LOAD(MAX)_ LR fPOLE _ LR = 2 x COUT _ LR x VOUT _ LR The unity-gain crossover of the linear regulator is: fCROSSOVER = AV_LR fPOLE_LR 2) The pole created by the internal amplifier delay is approximately 1MHz: fPOLE_AMP = 1MHz 3) Next, calculate the pole set by the transistor's input capacitance, the transistor's input resistance, and the base-to-emitter pullup resistor: fPOLE _ IN = where : g h CIN = m , RIN = FE 2fT gm gm is the transconductance of the pass transistor, and fT is the transition frequency. Both parameters can be found in the transistor's data sheet. Because RBE is much greater than RIN, the above equation can be simplified: fPOLE _ IN = 1 2 x CIN x RIN 1 2 x CIN x (RBE || RIN )
where CFB is the capacitance between FB_ and AGND, RUPPER is the upper resistor of the linear regulator's feedback divider, and RLOWER is the lower resistor of the divider. 5) Next, calculate the zero caused by the output capacitor's ESR: fPOLE _ ESR = 1 2 x COUT _ LR x RESR
where RESR is the equivalent series resistance of COUT_LR. To ensure stability, choose COUT_LR large enough so the crossover occurs well before the poles and zero calculated in steps 2 to 5. The poles in steps 3 and 4 generally occur at several megahertz, and using ceramic capacitors ensures the ESR zero occurs at several megahertz as well. Placing the crossover below 500kHz is sufficient to avoid the amplifier-delay pole and generally works well, unless unusual component choices or extra capacitances move one of the other poles or the zero below 1MHz.
Applications Information
Power Dissipation
An IC's maximum power dissipation depends on the thermal resistance from the die to the ambient environment and the ambient temperature. The thermal resistance depends on the IC package, PCB copper area, other thermal mass, and airflow. The MAX8795A, with its exposed backside paddle soldered to 1in2 of PCB copper and a large internal ground plane layer, can dissipate approximately 2.76W into +70C still air. More PCB copper, cooler ambient air, and more airflow increase the possible dissipation, while less copper or warmer air decreases the IC's dissipation capability. The major components of power dissipation are the power dissipated in the step-up regulator and the power dissipated by the operational amplifiers.
Substituting for CIN and RIN yields: f fPOLE _ IN = T hFE
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TFT-LCD DC-DC Converter with Operational Amplifiers
Step-Up Regulator The largest portions of power dissipation in the step-up regulator are the internal MOSFET, the inductor, and the output diode. If the step-up regulator has 90% efficiency, approximately 3% to 5% of the power is lost in the internal MOSFET, approximately 3% to 4% in the inductor, and approximately 1% in the output diode. The remaining 1% to 3% is distributed among the input and output capacitors and the PCB traces. If the input power is about 5W, the power lost in the internal MOSFET is approximately 150mW to 250mW. Operational Amplifier The power dissipated in the operational amplifiers depends on their output current, the output voltage, and the supply voltage:
PDSOURCE = IOUT _(SOURCE) x (VSUP - VOUT _ ) PDSINK = IOUT _(SINK) x VOUT _ where IOUT_(SOURCE) is the output current sourced by the operational amplifier, and IOUT_(SINK) is the output current that the operational amplifier sinks. In a typical case where the supply voltage is 13V and the output voltage is 6V with an output source current of 30mA, the power dissipated is 180mW. * Create a power-ground island (PGND) consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maximizing the width of the powerground traces improves efficiency and reduces output voltage ripple and noise spikes. Create an analog ground plane (AGND) consisting of the AGND pin, all the feedback-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device's exposed backside paddle. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside paddle. Make no other connections between these separate ground planes. * Place all feedback voltage-divider resistors within 5mm of their respective feedback pins. The divider's center trace should be kept short. Placing the resistors far away causes their FB traces to become antennas that can pick up switching noise. Take care to avoid running any feedback trace near LX or the switching nodes in the charge pumps, or provide a ground shield. * Place the IN pin and REF pin bypass capacitors as close as possible to the device. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace. * Minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. * Minimize the size of the LX node while keeping it wide and short. Keep the LX node away from feedback nodes (FB, FBP, and FBN) and analog ground. Use DC traces to shield if necessary. Refer to the MAX8795A evaluation kit for an example of proper PCB layout.
MAX8795A
PCB Layout and Grounding
Careful PCB layout is important for proper operation. Use the following guidelines for good PCB layout: * Minimize the area of high-current loops by placing the inductor, the output diode, and the output capacitors near the input capacitors and near the LX and PGND pins. The high-current input loop goes from the positive terminal of the input capacitor to the inductor, to the IC's LX pin, out of PGND, and to the input capacitor's negative terminal. The highcurrent output loop is from the positive terminal of the input capacitor to the inductor, to the output diode (D1), and to the positive terminal of the output capacitors, reconnecting between the output capacitor and input capacitor ground terminals. Connect these loop components with short, wide connections. Avoid using vias in the high-current paths. If vias are unavoidable, use many vias in parallel to reduce resistance and inductance.
Chip Information
TRANSISTOR COUNT: 6595 PROCESS: BiCMOS
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TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
Pin Configurations
COMP
24
FBP DRVP FBN
23
22
21
20
19
POS5 18
OUT5
NEG5
FB
LX
IN
OUT4 17 16 15 14 13
NEG4 POS4 SUP
TOP VIEW
25 26 27 28 29 30 31 32 1 SRC 2 REF 3 AGND 4 PGND 5 OUT1 6 NEG1 7 POS1 8 OUT2
DRVN DEL
CTL
OUT3 POS3
BGND
MAX8795A
12 11 10 9
DRN COM
POS2 NEG2
THIN QFN 5mm x 5mm
COMP
POS5 18
OUT5
NEG5
TOP VIEW
24
23
22
21
20
19
17
OUT4
FB
LX
IN
FBP 25 DRVP 26 FBN 27 DRVN 28 DEL 29 CTL 30 DRN 31 COM 32
16 15 14 13
NEG4 POS4 SUP OUT3 POS3 BGND POS2 NEG2
MAX8795A
12 11 10 9
+
1 SRC 2 REF 3 AGND 4 PGND 5 OUT1 6 NEG1 7 POS1 8 OUT2
LQFP 7mm x 7mm
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TFT-LCD DC-DC Converter with Operational Amplifiers
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE 32 TQFN 32 LQFP PACKAGE CODE T3255+3 C32+2 OUTLINE NO. 21-0140 21-0054 LAND PATTERN NO. 90-0025 90-0111
MAX8795A
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QFN THIN.EPS
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TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
Package Information (continued)
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
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TFT-LCD DC-DC Converter with Operational Amplifiers
Package Information (continued)
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
MAX8795A
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29
TFT-LCD DC-DC Converter with Operational Amplifiers MAX8795A
Package Information (continued)
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
30
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TFT-LCD DC-DC Converter with Operational Amplifiers
Revision History
REVISION NUMBER 0 1 2 3 REVISION DATE 4/07 6/07 12/10 3/11 Initial release Added LQFP package and G temperature grade versions Added TQFN version Added automotive-qualified part DESCRIPTION PAGES CHANGED 0 1, 2, 6-30 1-10, 27-30 1
MAX8795A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 31
(c) 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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